New LiquidCrystal library: /Users/fmalpartida/Documents/development/mercurial repos/SW/NewliquidCrystal/LiquidCrystal_SR1W.h Source File

New LiquidCrystal library 1.3.2 Generic LCD control library

- Main Page
- Related Pages
- Classes
- Files

- File List

/Users/fmalpartida/Documents/development/mercurial repos/SW/NewliquidCrystal/LiquidCrystal_SR1W.h
1
2 // ---------------------------------------------------------------------------
3 // Created/Adapted by Stephen Erisman 2013-07-06
4 // Copyright 2013 - Under creative commons license 3.0:
5 // Attribution-ShareAlike CC BY-SA
6 //
7 // This software is furnished "as is", without technical support, and with no
8 // warranty, express or implied, as to its usefulness for any purpose.
9 //
10 // @file LiquidCrystal_SR1W.h
11 // Connects a hd44780 LCD using 1 pin from the Arduino, via an 8-bit Latching
12 // ShiftRegister (SR1W from now on).
13 //
14 // @brief
15 // This is the 1 wire shift register interface class for the LCD library
16 //
17 // The functionality provided by this class and its base class is a superset of
18 // the original functionality of the Arduino LiquidCrystal library and can
19 // be used as such.
20 // See the LCD class for a full description of the API functions available.
21 //
22 // It works with a 8-bit latched, no-tristate, unidirectional SIPO (Serial-In-Parallel-Out)
23 // shift register, and an hd44780 LCD in 4-bit mode.
24 // The 74HC595 shift register has been tested.
25 //
26 //
27 // 1 Pin required from the Arduino:
28 // - Serial PIN:
29 // The Serial PIN is wired directly to the shift register's Clock PIN and its
30 // unaltered signal directly triggers the Clock on every LOW to HIGH transition.
31 //
32 // Additionally, the Serial PIN is wired through a resistor capacitor (RC) filter to
33 // the shift register's Data PIN. During a quick transition of the Serial PIN the
34 // RC filter will maintain the Data PIN's previous value because the capacitor isn't
35 // given enough time to charge (or discharge) to the alternate state. If the transition
36 // is held for enough time, however, the RC capacitor will charge (or discharge) and the
37 // value seen by the Data PIN will have changed state.
38 //
39 // There are two circuit versions that behave differently for Latch, Enable, and Clear:
40 //
41 // HW_CLEAR version:
42 // In this version the shift register's Latch and LCD's Enable PINs are wired directly to
43 // the shift register's Q'H output. The shift register's /Clear PIN is then wired up
44 // through two logic "gates": first QH and Q'H are AND'd together with a diode-resistor
45 // "gate" the output of which is NAND'd with VCC using a resistor-NPN-resistor "gate".
46 // So, /CLR = ((QH AND Q'H) NAND VCC). We also put a capacitor on the NPN base to GND
47 // to delay the signal a bit and allow the Latch and EN signals some extra time to trigger.
48 //
49 // This all fits together as follows:
50 // 1. We shift in a '1'.
51 // 2. Ws shift in the other 7 bits.
52 // 3. At this point the first '1' has been shifted into Q'H causing it to go HIGH.
53 // 4. When Q'H is HIGH it causes Latch and EN to also go HIGH.
54 // 5. When Latch transitions to HIGH it changes the shift register outputs to the bits
55 // that were shifted in.
56 // 6. This causes QH to go HIGH (if it wasn't already).
57 // 7. Now that QH AND Q'H are both HIGH they causes the base capacitor to start charging.
58 // 8. When the capacitor has charged enough the transistor brings /CLR LOW.
59 // 8. This will cause /CLR to trigger and the shift register will be cleared
60 // (NOTE: This doesn't change the latched outputs)
61 // 9. The clearing of the shift register causes Q'H to go LOW.
62 // 9. When Q'H is LOW it causes Latch and EN to also go LOW.
63 // 10. When EN transitions to LOW the LCD reads in the bits on the shift register pins
64 // and does it's thing.
65 // 11. Now that Q'H is LOW the base capacitor starts discharging.
66 // 12. When the capacitor has discharged enough the transistor will stop sinking /CLR.
67 // 13. This will cause /CLR to be pulled back up to HIGH by the VCC pullup resistor
68 // (it will stay that way until our next nibble/byte has been shifted in)
69 // 14. We are now ready for our next nibble/byte.
70 //
71 //
72 // SW_CLEAR version:
73 // In this version the Serial PIN is wired to the shift register's Latch and LCD's Enable
74 // PINs through another RC filter. These PINs are also wired through a diode (AND "gate")
75 // tied to the shift register's Q'H output. This combination means that the Latch and
76 // Enable PINs will be held LOW as long as EITHER the Q'H or RC output is LOW.
77 //
78 // This all fits together as follows:
79 // 1. We shift in a '1'.
80 // 2. We shift in the other 7 bits. (NOTE: We leave Serial PIN HIGH at the end of this)
81 // 3. At this point the first '1' has been shifted into Q'H causing it to go HIGH.
82 // (NOTE: Up until this time Q'H has been LOW so the attached diode has been keeping
83 // the Latch/EN pins LOW.)
84 // 4. Now that Q'H is HIGH it causes the attached diode to stop discharging the Latch/EN
85 // capacitor. We delay here for a while to make sure it is fully charged.
86 // 5. When the capacitor has charged enough Latch/EN will be HIGH
87 // 5. When Latch transitions to HIGH it changes the shift register outputs to what was
88 // shifted in.
89 // 6. We now bring the Serial PIN LOW and wait for the Latch/EN capacitor to discharge.
90 // 7. When the capacitor has discharged enough Latch/EN will be LOW
91 // 8. When EN transitions to LOW the LCD reads in the bits on the shift register pins
92 // and does it's thing.
93 // 9. We now shift in '0' 8 times (as quickly as possible).
94 // 10. If we keep the LOW to HIGH to LOW pulses short enough while shifting in the '0's
95 // the Latch/EN capacitor won't have time to charge to a point where it will re-trigger
96 // the Latch/EN pins.
97 // 11. Now Q'H will be LOW and the shift register has been cleared (NOTE: This doesn't
98 // change the latched outputs.)
99 // 12. We now bring the Serial PIN HIGH again and wait for the Data capacitor to recharge.
100 // 13. When the Data capacitor has fully charged we are ready for our next nibble/byte.
101 //
102 //
103 // These designs incorporate (and merge) ideas originally found here (1-wire concept):
104 // http://www.romanblack.com/shift1.htm
105 // and here (diode-resistor AND "gate" EN control):
106 // http://www.rentron.com/Myke1.htm
107 // as well as introducing some new and original ideas (particularly how HW_CLEAR works).
108 //
109 // Because of its use of the diode AND "gate", the SW_CLEAR design allows for faster sending
110 // of data to the LCD compared to Roman's original design. With the proposed 5uS delay (see
111 // notes below), a byte can be sent to the LCD in as little as 30 uS (plus overhead) when
112 // sending all 1's. This increases to as much as 190 uS (plus overhead) when sending all 0's.
113 // This is in comparison to Roman's estimate of around 3-4 mS to send a byte. So this
114 // implementation is 15-133 times faster for the cost of a single (1N4148 or similar) diode.
115 //
116 // The HW_CLEAR version is even faster as it can completely eliminate the clearSR() call as
117 // well as the delays that are needed to latch the data in the SW_CLEAR version.
118 //
119 //
120 // Default Shift Register Bits - Shifted MSB first:
121 // Bit #0 (QA) - not used
122 // Bit #1 (QB) - connects to LCD data input D7
123 // Bit #2 (QC) - connects to LCD data input D6
124 // Bit #3 (QD) - connects to LCD data input D5
125 // Bit #4 (QE) - connects to LCD data input D4
126 // Bit #5 (QF) - optional backlight control
127 // Bit #6 (QG) - connects to RS (Register Select) on the LCD
128 // Bit #7 (QH) - used for /CLR on the HW_CLEAR version (cannot be changed)
129 // (Q'H) - used for Latch/EN (via the diode AND "gate") (cannot be changed)
130 //
131 // NOTE: Any of these can be changed around as needed EXCEPT Bit #7 (QH and Q'H).
132 //
133 //
134 // Circuit Types (for the 74HC595)
135 // -------------------------------
136 // The 74HC595 is a latching shift register. See the explanations above for how these circuits
137 // work.
138 //
139 //
140 // HW_CLEAR version: (Faster but higher part count)
141 // ------------------------------------------------
142 //
143 // 74HC595 (VCC)
144 // +----u----+ | 2.2nF
145 // (LCD D7)------------1-|QB VCC|-16--+ +----||----(GND)
146 // (LCD D6)------------2-|QC QA|-15 |
147 // (LCD D5)------------3-|QD SER|-14-------+--[ Resistor ]--+
148 // (LCD D4)------------4-|QE /OE|-13--(GND) 1.5k |
149 // (BL Circuit)--------5-|QF RCK|-12-----+ |
150 // | | \ |
151 // (LCD RS)------------6-|QG SCK|-11-------)----------------+--(Serial PIN)
152 // | | |
153 // +-------7-|QH /CLR|-10-------)--+--[ Resistor ]--(VCC)
154 // | | | / | 1k
155 // | +--8-|GND Q'H|--9-----+ |
156 // | | +---------+ | | (GND)--(LCD RW)
157 // | | 0.1uF | \
158 // | (GND)-----||----(VCC) +------)--------------(LCD EN)
159 // | | /
160 // |----|<|----+--[ Resistor ]--| |
161 // diode | 1k C
162 // | |
163 // +-------------+---B-|> (NPN)
164 // | |
165 // (2.2nF) = E
166 // | |
167 // (GND) (GND)
168 //
169 //
170 // SW_CLEAR version: (Lower part count but slower)
171 // -----------------------------------------------
172 //
173 // 74HC595 (VCC)
174 // +----u----+ | 2.2nF
175 // (LCD D7)------------1-|QB VCC|-16--+ +----||----(GND)
176 // (LCD D6)------------2-|QC QA|-15 |
177 // (LCD D5)------------3-|QD SER|-14---------+--[ Resistor ]--+
178 // (LCD D4)------------4-|QE /OE|-13--(GND) 1.5k |
179 // (BL Circuit)--------5-|QF RCK|-12---------+ |
180 // | | \ |
181 // (LCD RS)------------6-|QG SCK|-11-----------)--------------+--(Serial PIN)
182 // 7-|QH /CLR|-10--(VCC) / |
183 // +--8-|GND Q'H|--9---|<|---+--[ Resistor ]--+
184 // | +---------+ diode | 1.5k
185 // | |
186 // | 0.1uF |
187 // (GND)-----||----(VCC) +----||----(GND)
188 // | 2.2nF
189 // (LCD EN)-------------------------------------+
190 // (LCD RW)--(GND)
191 //
192 //
193 // In either case the LCD RW pin is hardwired to GND meaning we will only be able to write
194 // to the LCD.
195 // Therefore, the Busy Flag (BF, data bit D7) is not able to be read and we have to make use
196 // of the minimum delay time constraints. This isn't really a problem because it usually
197 // takes us longer to shift and latch the data than the minimum delay anyway. For now, we
198 // simply keep track of our delays and add more delay at the end to get to at least 37 uS.
199 //
200 //
201 // Backlight Control Circuit
202 // -------------------------
203 // Since we are using the latching nature of the shift resiter we don't need the extra
204 // backlight circuitry that SR2W uses. Keeping it around, however, would still work because
205 // the circuit just slows down the transitions to the mosfet a bit.
206 //
207 // Here are two more optimized versions that can be used.
208 //
209 //
210 // NPN Transistor version: (Cheaper but more power draw and higher part count)
211 // ---------------------------------------------------------------------------
212 //
213 // (value depends on LCD, 100ohm is usually safe)
214 // (LCD BL anode)---[ resistor ]---(VCC)
215 //
216 // (LCD BL cathode)---------------+
217 // |
218 // C
219 // |
220 // (BL input)--[ Resistor ]---B-|> (NPN)
221 // 1k |
222 // E
223 // |
224 // (GND)
225 //
226 // NOTE: The Bate resistor is needed because the NPN is current fed. For lower
227 // power draw, try a 10k resistor.
228 //
229 //
230 // N-CH Mosfet version: (More costly but less power draw and lower part count)
231 // ---------------------------------------------------------------------------
232 //
233 // (value depends on LCD, 100ohm is usually safe)
234 // (LCD BL anode)---[ resistor ]---(VCC)
235 //
236 // (LCD BL cathode)---------------+
237 // |
238 // D
239 // |
240 // (BL input)----------------G-|-< (2N7000 FET)
241 // |
242 // S
243 // |
244 // (GND)
245 //
246 // NOTE: Gate resistor not needed because the mosfet is voltage fed and only really
247 // pulls current while switching.
248 //
249 // In either case, when the BL input is HIGH the LCD backlight will turn on.
250 //
251 //
252 // History
253 // 2013.07.31 serisman - fixed potential interrupt bug and made more performance optimizations
254 // 2013.07.10 serisman - more performance optimizations and modified the HW_CLEAR circuit a bit
255 // 2013.07.09 serisman - added an even faster version that performs the clear in hardware
256 // 2013.07.08 serisman - changed code to shift data MSB first to match SR2W
257 // 2013.07.07 serisman - major speed optimization
258 // 2013.07.06 serisman - created/modified from SR2W source to create SR1W
259 // @author S. Erisman - arduino@serisman.com
260 // --------------------------------------------------------------------------------
261
262 #ifndef _LIQUIDCRYSTAL_SR1W_
263 #define _LIQUIDCRYSTAL_SR1W_
264
265 #include <inttypes.h>
266 #include "LCD.h"
267 #include "FastIO.h"
268
269 // 1-wire SR timing constants
270 // ---------------------------------------------------------------------------
271
272 // NOTE:
273 // The 1.5k resistor (1.2k - 1.8k with a 20% tolerance)
274 // takes between 2.376uS and 4.36uS to fully charge or discharge
275 // the 2.2n capacitor (1.98n - 2.42n with a 10% tolerance).
276 // We round this up to a 5uS delay to provide an additional safety margin.
277
278 #define SR1W_DELAY_US 5
279 #define SR1W_DELAY() { delayMicroseconds(SR1W_DELAY_US); numDelays++; }
280
281 // 1-wire SR output bit constants
282 // ---------------------------------------------------------------------------
283
284 #define SR1W_UNUSED_MASK 0x01 // Set unused bit(s) to '1' as they are slightly faster to clock in.
285 #define SR1W_D7_MASK 0x02
286 #define SR1W_D6_MASK 0x04
287 #define SR1W_D5_MASK 0x08
288 #define SR1W_D4_MASK 0x10
289 #define SR1W_BL_MASK 0x20
290 #define SR1W_RS_MASK 0x40
291 #define SR1W_EN_MASK 0x80 // This cannot be changed. It has to be the first thing shifted in.
292
293 #define SR1W_ATOMIC_WRITE_LOW(reg, mask) ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { *reg &= ~mask; }
294 #define SR1W_ATOMIC_WRITE_HIGH(reg, mask) ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { *reg |= mask; }
295
296
297 typedef enum { SW_CLEAR, HW_CLEAR } t_sr1w_circuitType;
298
299 class LiquidCrystal_SR1W : public LCD
300 {
301 public:
313 LiquidCrystal_SR1W (uint8_t srdata, t_sr1w_circuitType circuitType,
314 t_backlighPol blpol = POSITIVE);
315
328 virtual void send(uint8_t value, uint8_t mode);
329
330
340 void setBacklight ( uint8_t mode );
341
342 private:
343
349 void init ( uint8_t srdata, t_sr1w_circuitType circuitType, t_backlighPol blpol,
350 uint8_t lines, uint8_t font );
351
357 uint8_t clearSR ();
358
363 uint8_t loadSR (uint8_t val);
364
365 fio_register _srRegister; // Serial PIN
366 fio_bit _srMask;
367
368 t_sr1w_circuitType _circuitType;
369
370 uint8_t _blPolarity;
371 uint8_t _blMask;
372 };
373 #endif
LiquidCrystal_SR1W
Definition: LiquidCrystal_SR1W.h:299
LCD
Definition: LCD.h:187
LiquidCrystal_SR1W::send
virtual void send(uint8_t value, uint8_t mode)
Definition: LiquidCrystal_SR1W.cpp:194
LiquidCrystal_SR1W::setBacklight
void setBacklight(uint8_t mode)
Definition: LiquidCrystal_SR1W.cpp:235
LiquidCrystal_SR1W::LiquidCrystal_SR1W
LiquidCrystal_SR1W(uint8_t srdata, t_sr1w_circuitType circuitType, t_backlighPol blpol=POSITIVE)
Definition: LiquidCrystal_SR1W.cpp:40